Power-Efficient Computer Architectures: Recent Advances Contributor(s): Själander, Magnus (Author), Martonosi, Margaret (Author), Kaxiras, Stefanos (Author) |
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ISBN: 1627056459 ISBN-13: 9781627056458 Publisher: Morgan & Claypool
Binding Type: Paperback Published: December 2014 * Out of Print * Click for more in this series: Synthesis Lectures on Computer Architecture |
Additional Information |
BISAC Categories: - Computers | Computer Engineering - Computers | Systems Architecture - Distributed Systems & Computing - Computers | Software Development & Engineering - Systems Analysis & Design |
Series: Synthesis Lectures on Computer Architecture |
Physical Information: 0.2" H x 7.5" W x 9.25" L (0.40 lbs) 96 pages |
Features: Bibliography |
Descriptions, Reviews, Etc. |
Publisher Description: As Moore's Law and Dennard scaling trends have slowed, the challenges of building high-performance computer architectures while maintaining acceptable power efficiency levels have heightened. Over the past ten years, architecture techniques for power efficiency have shifted from primarily focusing on module-level efficiencies, toward more holistic design styles based on parallelism and heterogeneity. This work highlights and synthesizes recent techniques and trends in power-efficient computer architecture. Table of Contents: Introduction / Voltage and Frequency Management / Heterogeneity and Specialization / Communication and Memory Systems / Conclusions / Bibliography / Authors' Biographies |
Contributor Bio(s): Kaxiras, Stefanos: - Uppsala UniversitySjalander, Magnus: - Uppsala UniversityMartonosi, Margaret: - Princeton University |
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