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A Primer on Hardware Prefetching
Contributor(s): Falsafi, Babak (Author), Wenisch, Thomas F. (Author)

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ISBN: 1608459527     ISBN-13: 9781608459520
Publisher: Morgan & Claypool
OUR PRICE: $28.50  

Binding Type: Paperback - See All Available Formats & Editions
Published: May 2014

Click for more in this series: Synthesis Lectures on Computer Architecture
Additional Information
BISAC Categories:
- Computers | Computer Engineering
- Computers | Systems Architecture - General
- Computers | Microprocessors
Dewey: 005.43
Series: Synthesis Lectures on Computer Architecture
Physical Information: 0.14" H x 7.52" W x 9.25" (0.29 lbs) 67 pages
Features: Bibliography, Illustrated
Descriptions, Reviews, Etc.

Contributor Bio(s): Falsafi, Babak: - Babak Falsafi is a Professor in the School of Computer and Communication Sciences at EPFL, and the founding director of the EcoCloud research center, targeting future energy efficient and environmentally friendly cloud technologies. He has made numerous contributions to computer system design and evaluation including: a scalable multiprocessor architecture that laid the foundation for the Sun (now Oracle) WildFire servers; snoop filters; temporal stream prefetchers that are incorporated into IBM BlueGene/P and BlueGene/Q; and computer system simulation sampling methodologies that have been in use by AMD and HP for research and product development. His most notable contribution has been to be first to show that, contrary to conventional wisdom, multiprocessor memory programming models--known as memory consistency models--prevalent in all modern systems are neither necessary nor sufficient to achieve high performance. He is a recipient of an NSF CAREER award, IBM Faculty Partnership Awards, and an Alfred P. Sloan Research Fellowship. He is a fellow of IEEE.Wenisch, Thomas F.: - Thomas Wenisch is an Associate Professor of Computer Science and Engineering at the University of Michigan, specializing in computer architecture. His prior research includes memory streaming for commercial server applications, store-wait-free multiprocessor memory systems, memory disaggregation, and rigorous sampling-based performance evaluation methodologies. His ongoing work focuses on computational sprinting, memory persistency, data center architecture, energy-efficient server design, and accelerators for medical imaging. Wenisch received the NSF CAREER award in 2009 and the University of Michigan Henry Russel Award in 2013. He received his Ph.D. in Electrical and Computer Engineering from Carnegie Mellon University.
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